Semiconductor devices such as integrated circuits and the like, are formed by performing a series of processing operations upon a substrate to form accurately sized and precisely aligned device features. The device features are formed from various conductive and dielectric films that are formed on the substrate. The processing operations include multiple photolithographic patterning processes used to pattern the various conductive and dielectric films and also to define regions in the films or the substrate into which various impurities will be introduced. It is critical to accurately define the various device features so that they are accurately sized, positioned and aligned to tight tolerances.
In each of the multiple photolithographic patterning processes, it is critical to project the photolithographic image onto a focal plane that is at a known location such as the substrate surface. If the substrate surface is not at the expected location, pattern distortion and/or misalignment may result. If the substrate surface is not uniformly level, then such pattern distortion and/or misalignment may occur at various locations across the substrate. Many other of the processing operations used to form the various device features are similarly sensitive to the position of the substrate surface. In summary, non-uniformities in the substrate surface can translate to improperly sized, positioned and aligned device features throughout the substrate. This may result in device characteristics that fail and/or vary unacceptably across the substrate.
It is therefore important for the substrate surface to be uniformly level and likewise important to be able to monitor the topographical uniformity of the substrate surface. This is especially true as device feature sizes shrink into the nanometer regime while substrate sizes increase to 12 inch diameters or greater, increasing the likelihood that substrate surface non-uniformities will result in device feature defects. It would be especially useful to be able to obtain such topographical data on the raw substrate, during the in-line processing of the substrate and responsive to the detection of unacceptable or non-uniform device parameters or characteristics. Such timely information would be useful in establishing a correlation between these parameters or characteristics, and the substrate topography, or in determining another root cause of the problem. The acquisition of in-line surface topographical data would also be useful in determining the degree of substrate surface non-uniformity that is acceptable for production use. This applies to the various substrates upon which semiconductor devices are formed such as silicon wafers, gallium arsenide wafers, sapphire wafers, and other substrates.
FIGS. 1A and 1B are exemplary scans of raw substrate surface profiles showing a substrate with an acceptably level profile in FIG. 1A and an unacceptable substrate with extreme undulations shown in FIG. 1B. While “acceptable” versus “unacceptable” is an arbitrary and relative designation, it is apparent that the substrate depicted graphically in FIG. 1A has a relatively uniform surface and also that the substrate depicted graphically in FIG. 1B exhibits relatively poor uniformity. Referring to the substrate depicted graphically in FIG. 1B, it would appear that patterning and other inconsistencies will be produced between devices and features formed in the relatively low areas 101 and those formed in the relatively high areas 103 of such a substrate.
According to existing technological capabilities, the topography of a substrate is detected and mapped when the substrate is in raw form, i.e., prior to the various manufacturing processing operations carried out upon the substrate. It would therefore be useful to provide a method for mapping the topography of the raw substrate while in-line processing operations are being carried out on the substrate especially since anomalies or non-uniformities are commonly detected during the in-line formation of the devices. The generation of such in-line mapping data can be useful in determining root cause effects of the various anomalies and in instituting immediate fixes and/or other process controls.